3037 search results - page 43 / 608 » A High Performance Application Representation for Reconfigur... |
124
click to vote
CN
2004
14 years 11 months ago
2004
This work deals with reconfigurable control functions and protocols for supporting mobile computing applications in heterogeneous wireless systems like cellular networks and WLANs...
ICMCS
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper introduces the software framework MMER Lab which allows an effective assembly of modular signal processing systems optimized for memory efficiency and performance. Our...
ERSA
2009
14 years 9 months ago
2009
- The FPGA (re)configuration is a time-consuming process and a bottleneck in FPGA-based Run-Time Reconfigurable (RTR) systems. In this paper, we present a High Level Synthesis (HLS...
102
click to vote
FCCM
1999
IEEE
15 years 4 months ago
1999
IEEE
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
128
click to vote
PPOPP
2006
ACM
15 years 5 months ago
2006
ACM
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...