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FPL
2008
Springer
119views Hardware» more  FPL 2008»
15 years 1 months ago
Polymorphic wavelet architectures using reconfigurable hardware
Traditional microprocessor-based solutions are insufficient to serve the dynamic throughput demands of real-time scalable multimedia processing systems. This paper introduces a Po...
Amit Pande, Joseph Zambreno
CODES
2003
IEEE
15 years 5 months ago
A fast parallel reed-solomon decoder on a reconfigurable architecture
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
Arezou Koohi, Nader Bagherzadeh, Chengzi Pan
EUROPAR
2003
Springer
15 years 5 months ago
RECSY - A High Performance Library for Sylvester-Type Matrix Equations
In this presentation, we give an overview of research activities at the Department of Computing Science, Ume˚a University with focus on Scientific, Parallel and High-Performance...
Isak Jonsson, Bo Kågström
CODASPY
2012
13 years 7 months ago
Identifying native applications with high assurance
Main stream operating system kernels lack a strong and reliable mechanism for identifying the running processes and binding them to the corresponding executable applications. In t...
Hussain M. J. Almohri, Danfeng (Daphne) Yao, Denni...
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
15 years 6 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...