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» A High Performance Kernel-Less Operating System Architecture
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CODES
2007
IEEE
15 years 9 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
SEUS
2008
IEEE
15 years 9 months ago
Delay-Aware Mobile Transactions
In the expanding e-society, mobile embedded systems are increasingly used to support transactions such as for banking, stock or database applications. Such systems entail a range o...
Brahim Ayari, Abdelmajid Khelil, Neeraj Suri
115
Voted
ISCA
2007
IEEE
162views Hardware» more  ISCA 2007»
15 years 9 months ago
BulkSC: bulk enforcement of sequential consistency
While Sequential Consistency (SC) is the most intuitive memory consistency model and the one most programmers likely assume, current multiprocessors do not support it. Instead, th...
Luis Ceze, James Tuck, Pablo Montesinos, Josep Tor...
IOLTS
2005
IEEE
125views Hardware» more  IOLTS 2005»
15 years 8 months ago
Design of a Self Checking Reed Solomon Encoder
— In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in G...
Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco...
LFP
1992
140views more  LFP 1992»
15 years 4 months ago
Global Tagging Optimization by Type Inference
Tag handling accounts for a substantial amount of execution cost in latently typed languages such as Common LISP and Scheme, especially on architectures that provide no special ha...
Fritz Henglein