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» A High Performance Kernel-Less Operating System Architecture
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ISMVL
2010
IEEE
174views Hardware» more  ISMVL 2010»
15 years 3 months ago
Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits
—Fixed-point multiplication architectures are designed and evaluated using a set of logic cells based on a radix-4, quaternary number system. The library of logic circuits is bas...
Satyendra R. Datla, Mitchell A. Thornton
70
Voted
EH
1999
IEEE
122views Hardware» more  EH 1999»
15 years 2 months ago
The MorphoSys Dynamically Reconfigurable System-on-Chip
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
Guangming Lu, Hartej Singh, Ming-Hau Lee, Nader Ba...
ASPLOS
2008
ACM
15 years 4 days ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
FASE
2008
Springer
14 years 12 months ago
Language-Based Optimisation of Sensor-Driven Distributed Computing Applications
In many distributed computing paradigms, especially sensor networks and ubiquitous computing but also grid computing and web services, programmers commonly tie their application to...
Jonathan J. Davies, Alastair R. Beresford, Alan My...
102
Voted
CSREAESA
2004
14 years 11 months ago
An Energy-Aware Synthesis Methodology for OS-Driven Multi-Process Embedded Software
The growing software content in various battery-driven embedded systems has led to significant interest in technologies for energy-efficient embedded software. While lowenergy sof...
Tat Kee Tan, Anand Raghunathan, Niraj K. Jha