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ICCAD
2010
IEEE
146views Hardware» more  ICCAD 2010»
13 years 4 months ago
Through-silicon-via management during 3D physical design: When to add and how many?
In 3D integrated circuits through silicon vias (TSVs) are used to connect different dies stacked on top of each other. These TSV occupy silicon area and have significantly larger a...
Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Ky...
IJRR
2007
117views more  IJRR 2007»
13 years 6 months ago
Wave Haptics: Building Stiff Controllers from the Natural Motor Dynamics
— Haptics, like the fields of robotics and motion control, relies on high stiffness position control of electric motors. Traditionally DC motors are driven by current amplifier...
Nicola Diolaiti, Günter Niemeyer, Neal A. Tan...
ICCAD
1991
IEEE
100views Hardware» more  ICCAD 1991»
13 years 9 months ago
Layout Driven Logic Restructuring/Decomposition
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
Massoud Pedram, Narasimha B. Bhat
ICCAD
2003
IEEE
145views Hardware» more  ICCAD 2003»
14 years 3 months ago
Manufacturing-Aware Physical Design
Ultra-deep submicron manufacturability impacts physical design (PD) through complex layout rules and large guardbands for process variability; this creates new requirements for ne...
Puneet Gupta, Andrew B. Kahng
DAC
2003
ACM
14 years 7 months ago
Pushing ASIC performance in a power envelope
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
Ruchir Puri, Leon Stok, John M. Cohn, David S. Kun...