To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
This paper studies the impact on energy efficiency and thermal behavior of design style and clock-gating style in queue and array structures. These structures are major sources of...
Yingmin Li, Mark Hempstead, Patrick Mauro, David B...
Many algorithm visualizations have been created, but little is known about which features are most important to their success. We believe that pedagogically useful visualizations ...
Purvi Saraiya, Clifford A. Shaffer, D. Scott McCri...
On a N-way issue superscalar processor, the front end instruction fetch engine must deliver instructions to the execution core at a sustained rate higher than N instructions per c...
Abstract. In this paper we study a new approach to classify mathematical theorems according to their computational content. Basically, we are asking the question which theorems can...