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» A Logic for True Concurrency
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DAC
2001
ACM
16 years 19 days ago
A True Single-Phase 8-bit Adiabatic Multiplier
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...
111
Voted
ENTCS
2006
189views more  ENTCS 2006»
14 years 11 months ago
Variables as Resource for Shared-Memory Programs: Semantics and Soundness
Parkinson, Bornat, and Calcagno recently introduced a logic for partial correctness in which program variables are treated as resource, generalizing earlier work based on separati...
Stephen D. Brookes
106
Voted
ADAEUROPE
2000
Springer
15 years 4 months ago
(True) Polymorphism in SPARK2000
of the Reliant Telco Platform, K. Wiesneth Safety-oriented INTERBUS INTERBUS Safety-, K. Meyer-Graefe Developing a Binding Process for Automated Program Recognition and Fault Local...
Tse-Min Lin, John A. McDermid
83
Voted
ENTCS
2008
99views more  ENTCS 2008»
14 years 11 months ago
Specifying Properties of Concurrent Computations in CLF
CLF (the Concurrent Logical Framework) is a language for specifying and reasoning about concurrent systems. Its most significant feature is the first-class representation of concu...
Kevin Watkins, Iliano Cervesato, Frank Pfenning, D...
81
Voted
FPL
2004
Springer
154views Hardware» more  FPL 2004»
15 years 5 months ago
High Performance True Random Number Generator in Altera Stratix FPLDs
Abstract. The paper presents a high performance True Random Number Generator (TRNG) embedded in Altera Stratix Field Programmable Logic Devices (FPLDs). As a source of randomness, ...
Viktor Fischer, Milos Drutarovský, Martin S...