1410 search results - page 8 / 282 » A Logic for Virtual Memory |
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
- With the increasing demand for SoCs to include rich functionality, SoCs are being designed with hundreds of small memories with different sizes and frequencies. If memory BIST lo...
ISCA
2010
IEEE
15 years 2 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
USENIX
2003
14 years 10 months ago
2003
Despite constant improvements in fabrication technology, hardware components are consuming more power than ever. With the everincreasing demand for higher performance in highly-in...
ASPLOS
2010
ACM
15 years 4 months ago
2010
ACM
Computer systems with virtual memory are susceptible to design bugs and runtime faults in their address translation (AT) systems. Detecting bugs and faults requires a clear speci...
LFCS
2007
Springer
15 years 3 months ago
2007
Springer
Abstract. In order to verify programs with pointer variables, we introduce a temporal logic LTLmem whose underlying assertion language is the quantifier-free fragment of separatio...