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» A Low Power TLB Structure for Embedded Systems
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ICCD
2000
IEEE
94views Hardware» more  ICCD 2000»
15 years 2 months ago
A Decompression Architecture for Low Power Embedded Systems
Haris Lekatsas, Jörg Henkel, Wayne Wolf
RTAS
2000
IEEE
15 years 2 months ago
Voltage-Clock-Scaling Adaptive Scheduling Techniques for Low Power in Hard Real-Time Systems
—Many embedded systems operate under severe power and energy constraints. Voltage clock scaling is one mechanism by which energy consumption may be reduced: It is based on the fa...
C. Mani Krishna, Yann-Hang Lee
FAST
2011
14 years 1 months ago
Exploiting Half-Wits: Smarter Storage for Low-Power Devices
This work analyzes the stochastic behavior of writing to embedded flash memory at voltages lower than recommended by a microcontroller’s specifications to reduce energy consum...
Mastooreh Salajegheh, Yue Wang, Kevin Fu, Anxiao J...
DATE
2003
IEEE
141views Hardware» more  DATE 2003»
15 years 3 months ago
On-chip Stack Based Memory Organization for Low Power Embedded Architectures
This paper presents a on-chip stack based memory organization that effectively reduces the energy dissipation in programmable embedded system architectures. Most embedded systems ...
Mahesh Mamidipaka, Nikil D. Dutt