743 search results - page 51 / 149 » A Mechanism for Communicating in Dynamically Reconfigurable ... |
136
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MAM
2007
15 years 1 months ago
2007
This paper describes a new method of executing a software program on an FPGA for embedded systems. Rather than combine reconfigurable logic with a microprocessor core, this method...
105
Voted
RECONFIG
2009
IEEE
15 years 8 months ago
2009
IEEE
—We envision that future FPGA will use a hardwired network on chip (HWNoC) [14] as a unified interconnect for functional communications (data and control) as well as configurat...
117
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PERCOM
2006
ACM
15 years 1 months ago
2006
ACM
Sensor network operating systems have to operate with limited hardware resources. Constraints on power consumption greatly reduce the resources available to such an operating syst...
115
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DATE
2009
IEEE
15 years 8 months ago
2009
IEEE
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
130
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DAC
2007
ACM
16 years 2 months ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...