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» A Mechanism for Verifying Data Speculation
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ISCAPDCS
2001
14 years 11 months ago
Tolerating Transient Faults through an Instruction Reissue Mechanism
In this paper, we propose a fault-tolerant mechanism for microprocessors, which detects transient faults and recovers from them. There are two driving force to investigate fault-t...
Toshinori Sato, Itsujiro Arita
MICRO
2005
IEEE
163views Hardware» more  MICRO 2005»
15 years 3 months ago
ReSlice: Selective Re-Execution of Long-Retired Misspeculated Instructions Using Forward Slicing
As more data value speculation mechanisms are being proposed to speed-up processors, there is growing pressure on the critical processor structures that must buffer the state of t...
Smruti R. Sarangi, Wei Liu, Yuanyuan Zhou
ISPASS
2005
IEEE
15 years 3 months ago
Reaping the Benefit of Temporal Silence to Improve Communication Performance
Communication misses--those serviced by dirty data in remote caches--are a pressing performance limiter in shared-memory multiprocessors. Recent research has indicated that tempor...
Kevin M. Lepak, Mikko H. Lipasti
TASE
2008
IEEE
15 years 3 months ago
Verifying BPEL-Like Programs with Hoare Logic
The WS-BPEL language has recently become a de facto standard for modeling Web-based business processes. One of its essential features is the fully programmable compensation mechan...
Chenguang Luo, Shengchao Qin, Zongyan Qiu
ASPLOS
2004
ACM
15 years 2 months ago
Scalable selective re-execution for EDGE architectures
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...
Rajagopalan Desikan, Simha Sethumadhavan, Doug Bur...