3394 search results - page 180 / 679 » A Modal Model of Memory |
172
click to vote
IPPS
2005
IEEE
15 years 9 months ago
2005
IEEE
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
101
Voted
ISCAS
2005
IEEE
15 years 9 months ago
2005
IEEE
— Compared with a single level Hamming associative memory, a simple model based on uniform random noise analysis has proved a twolevel decoupled Hamming network to be an efficie...
139
Voted
ISPASS
2005
IEEE
15 years 9 months ago
2005
IEEE
We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestam...
134
Voted
HPCC
2005
Springer
15 years 9 months ago
2005
Springer
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
160
click to vote
ASIASIM
2004
Springer
15 years 9 months ago
2004
Springer
Abstract. Recently, flash memory is widely used in embedded applications since it has strong points: non-volatility, fast access speed, shock resistance, and low power consumption...