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» A Model of Tolerance
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FPGA
2009
ACM
159views FPGA» more  FPGA 2009»
15 years 4 months ago
Choose-your-own-adventure routing: lightweight load-time defect avoidance
Aggressive scaling increases the number of devices we can integrate per square millimeter but makes it increasingly difficult to guarantee that each device fabricated has the inte...
Raphael Rubin, André DeHon
CODES
2010
IEEE
14 years 6 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...
SEKE
2009
Springer
15 years 2 months ago
Collaborative Development of System Architecture - a Tool for Coping with Inconsistency
Very large systems have an architecture that is designed to allow them to evolve through a long life. Such systems are developed by teams of architects. One of the first things t...
Peter Henderson, Matthew J. Henderson
GLVLSI
2002
IEEE
136views VLSI» more  GLVLSI 2002»
15 years 2 months ago
Test generation for resistive opens in CMOS
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
Arun Krishnamachary, Jacob A. Abraham
ISCAS
2007
IEEE
106views Hardware» more  ISCAS 2007»
15 years 4 months ago
Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-tolerant Nanoscale Circuit Design
—Two probabilistic-based models, namely the Ensemble-Dependent Matrix model [1][3] and the Markov Random Field model [2], have been proposed to deal with faults in nanoscale syst...
Huifei Rao, Jie Chen, Changhong Yu, Woon Tiong Ang...