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CF
2010
ACM
15 years 2 months ago
On-chip communication and synchronization mechanisms with cache-integrated network interfaces
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
Stamatis G. Kavadias, Manolis Katevenis, Michail Z...
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
14 years 8 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
DAC
2003
ACM
15 years 2 months ago
A timing-accurate modeling and simulation environment for networked embedded systems
The design of state-of-the-art, complex embedded systems requires the capability of modeling and simulating the complex networked environment in which such systems operate. This i...
Franco Fummi, Giovanni Perbellini, Paolo Gallo, Ma...
ICIW
2008
IEEE
15 years 4 months ago
Networking Aspects for Gaming Systems
As the evolution of computer technology introduces new advances in networks among others, online gaming becomes a new trend. Following the trends of our era, Games At Large IST Pr...
Christos Bouras, Vassilis Poulopoulos, Ioannis Sen...
DAC
2009
ACM
15 years 4 months ago
Endosymbiotic computing: enabling surrogate GUI and cyber-physical connectivity
Endosymbiotic Computing entails attaching an RF-enabled microcontroller module (endomodule) to an appliance such that it appears as a networked device in the cyber world. It enabl...
Pai H. Chou