497 search results - page 54 / 100 » A Network on Chip Architecture and Design Methodology |
NOCS
2007
IEEE
15 years 6 months ago
2007
IEEE
Abstract – With the rise of multicore computing, the design of onchip networks (or networks on chip) has become an increasingly important component of computer architecture. The ...
109
click to vote
CORR
2006
Springer
14 years 12 months ago
2006
Springer
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
DATE
2010
IEEE
15 years 5 months ago
2010
IEEE
There is today little doubt on the fact that a high-performance and cost-effective Network-on-Chip can only be designed in 45nm and beyond under a relaxed synchronization assumpti...
101
click to vote
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
ASPDAC
2005
ACM
15 years 1 months ago
2005
ACM
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...