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» A Network on Chip Architecture and Design Methodology
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MM
2005
ACM
103views Multimedia» more  MM 2005»
15 years 5 months ago
IrisNet: an internet-scale architecture for multimedia sensors
Most current sensor network research explores the use of extremely simple sensors on small devices called motes and focuses on overcoming the resource constraints of these devices...
Jason Campbell, Phillip B. Gibbons, Suman Nath, Pa...
DAC
2005
ACM
15 years 1 months ago
Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits
Reliability of nanometer circuits is becoming a major concern in today’s VLSI chip design due to interferences from multiple noise sources as well as radiation-induced soft erro...
Chong Zhao, Yi Zhao, Sujit Dey
FPL
2005
Springer
111views Hardware» more  FPL 2005»
15 years 5 months ago
Mutable Codesign for Embedded Protocol Processing
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
Todd S. Sproull, Gordon J. Brebner, Christopher E....
DAC
2011
ACM
13 years 11 months ago
Fault-tolerant 3D clock network
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu...
128
Voted
ADHOC
2005
165views more  ADHOC 2005»
14 years 11 months ago
A survey on routing protocols for wireless sensor networks
Recent advances in wireless sensor networks have led to many new protocols specifically designed for sensor networks where energy awareness is an essential consideration. Most of ...
Kemal Akkaya, Mohamed F. Younis