497 search results - page 70 / 100 » A Network on Chip Architecture and Design Methodology |
105
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SAC
2006
ACM
15 years 5 months ago
2006
ACM
In a recent work, we have shown that it is not possible to dependably build any type of distributed f fault or intrusiontolerant system under the asynchronous model. This result f...
P2P
2009
IEEE
15 years 6 months ago
2009
IEEE
—ModelNet is a network emulator designed for repeatable, large-scale experimentation with real networked systems. This talk introduces the ideas behind ModelNet that have made it...
119
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NOCS
2007
IEEE
15 years 6 months ago
2007
IEEE
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
88
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ASPDAC
2007
ACM
15 years 3 months ago
2007
ACM
- Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-...
TOG
2010
14 years 6 months ago
2010
We present a method for automated generation of building layouts for computer graphics applications. Our approach is motivated by the layout design process developed in architectu...