2794 search results - page 132 / 559 » A New Architecture for Automated Modelling |
ICS
2009
Tsinghua U.
15 years 6 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
112
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CF
2004
ACM
15 years 5 months ago
2004
ACM
New applications and standards are first conceived only for functional correctness and without concerns for the target architecture. The next challenge is to map them onto an arch...
DAC
2005
ACM
16 years 15 days ago
2005
ACM
Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
97
Voted
CODES
2006
IEEE
15 years 5 months ago
2006
IEEE
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
107
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DAC
2009
ACM
16 years 16 days ago
2009
ACM
Exponentially rising cooling/packaging costs due to high power density call for architectural and software-level thermal management. Dynamic thermal management (DTM) techniques co...