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VLSISP
2010
119views more  VLSISP 2010»
14 years 4 months ago
Hardware Acceleration of HMMER on FPGAs
We propose a new parallelization scheme for the hmmsearch function of the HMMER software, in order to target FPGA technology. hmmsearch is a very compute intensive software for bio...
Steven Derrien, Patrice Quinton
77
Voted
IPPS
2008
IEEE
15 years 4 months ago
Junction tree decomposition for parallel exact inference
We present a junction tree decomposition based algorithm for parallel exact inference. This is a novel parallel exact inference method for evidence propagation in an arbitrary jun...
Yinglong Xia, Viktor K. Prasanna
94
Voted
VLSID
1996
IEEE
119views VLSI» more  VLSID 1996»
15 years 2 months ago
Parallel simulated annealing strategies for VLSI cell placement
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process, and as a result several research efforts have been un...
John A. Chandy, Prithviraj Banerjee
81
Voted
HPCA
2001
IEEE
15 years 10 months ago
CARS: A New Code Generation Framework for Clustered ILP Processors
Clustered ILP processors are characterized by a large number of non-centralized on-chip resources grouped into clusters. Traditional code generation schemes for these processors c...
Krishnan Kailas, Kemal Ebcioglu, Ashok K. Agrawala
SPAA
1993
ACM
15 years 2 months ago
Optimal Parallel Construction of Hamiltonian Cycles and Spanning Trees in Random Graphs
We give tight bounds on the parallel complexity of some problems involving random graphs. Speci cally, we show that a Hamiltonian cycle, a breadth rst spanning tree, and a maximal...
Philip D. MacKenzie, Quentin F. Stout