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PPOPP
2006
ACM
16 years 10 days ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
FCCM
2005
IEEE
132views VLSI» more  FCCM 2005»
15 years 12 months ago
Hardware Factorization Based on Elliptic Curve Method
The security of the most popular asymmetric cryptographic scheme RSA depends on the hardness of factoring large numbers. The best known method for factorization large integers is ...
Martin Simka, Jan Pelzl, Thorsten Kleinjung, Jens ...
ICDCS
2005
IEEE
15 years 12 months ago
DISC: Dynamic Interleaved Segment Caching for Interactive Streaming
Streaming media objects have become widely used on the Internet, and the demand of interactive requests to these objects has increased dramatically. Typical interactive requests i...
Lei Guo, Songqing Chen, Zhen Xiao, Xiaodong Zhang
IPPS
2005
IEEE
15 years 12 months ago
Energy-Aware Task Scheduling: Towards Enabling Mobile Computing over MANETs
Enabling high performance, persistent mobile computing has recently become a very active research area. The widespread popularity of mobile computing devices, such as laptops, han...
Waleed Alsalih, Selim G. Akl, Hossam S. Hassanein
ISCA
2005
IEEE
144views Hardware» more  ISCA 2005»
15 years 12 months ago
Scalable Load and Store Processing in Latency Tolerant Processors
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...
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