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ISCA
1996
IEEE
130views Hardware» more  ISCA 1996»
15 years 3 months ago
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
Mark Horowitz, Margaret Martonosi, Todd C. Mowry, ...
ICCBR
1997
Springer
15 years 3 months ago
Supporting Combined Human and Machine Planning: An Interface for Planning by Analogical Reasoning
Realistic and complex planning situations require a mixed-initiative planning framework in which human and automated planners interact to mutually construct a desired plan. Ideally...
Michael T. Cox, Manuela M. Veloso
DAC
1996
ACM
15 years 3 months ago
Optimal Clock Skew Scheduling Tolerant to Process Variations
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
José Luis Neves, Eby G. Friedman
KDD
2010
ACM
199views Data Mining» more  KDD 2010»
15 years 3 months ago
Overlapping experiment infrastructure: more, better, faster experimentation
At Google, experimentation is practically a mantra; we evaluate almost every change that potentially affects what our users experience. Such changes include not only obvious user-...
Diane Tang, Ashish Agarwal, Deirdre O'Brien, Mike ...
ATAL
2006
Springer
15 years 3 months ago
Multiply-constrained distributed constraint optimization
Distributed constraint optimization (DCOP) has emerged as a useful technique for multiagent coordination. While previous DCOP work focuses on optimizing a single team objective, i...
Emma Bowring, Milind Tambe, Makoto Yokoo
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