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» A Predictive Performance Model for Superscalar Processors
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MICRO
2007
IEEE
167views Hardware» more  MICRO 2007»
15 years 3 months ago
Informed Microarchitecture Design Space Exploration Using Workload Dynamics
Program runtime characteristics exhibit significant variation. As microprocessor architectures become more complex, their efficiency depends on the capability of adapting with wor...
Chang-Burm Cho, Wangyuan Zhang, Tao Li
3DIC
2009
IEEE
153views Hardware» more  3DIC 2009»
15 years 4 months ago
Junction-level thermal extraction and simulation of 3DICs
Abstract—In 3DICs heat dissipating devices are stacked directly on top of each other leading to a higher heat density than in a comparable 2D chip. 3D integration also moves the ...
Samson Melamed, Thorlindur Thorolfsson, Adi Sriniv...
EGH
2004
Springer
15 years 1 months ago
Efficient partitioning of fragment shaders for multiple-output hardware
Partitioning fragment shaders into multiple rendering passes is an effective technique for virtualizing shading resource limits in graphics hardware. The Recursive Dominator Split...
Tim Foley, Mike Houston, Pat Hanrahan
SBBD
2003
101views Database» more  SBBD 2003»
14 years 11 months ago
Cherry Picking: A Semantic Query Processing Strategy for the Evaluation of Expensive Predicates
A common requirement of many scientific applications is the ability to process queries involving expensive predicates corresponding to user programs. Optimizing such queries is ha...
Fabio Porto, Eduardo Sany Laber, Patrick Valduriez
RTAS
2006
IEEE
15 years 3 months ago
Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller