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DATE
2009
IEEE
113views Hardware» more  DATE 2009»
16 years 9 days ago
Scalable compile-time scheduler for multi-core architectures
As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing...
Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi,...
GLVLSI
2009
IEEE
146views VLSI» more  GLVLSI 2009»
15 years 9 months ago
A reconfigurable stochastic architecture for highly reliable computing
Mounting concerns over variability, defects and noise motivate a new approach for integrated circuits: the design of stochastic logic, that is to say, digital circuitry that opera...
Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan...
ICWE
2004
Springer
15 years 11 months ago
A Scalable Component-Based Architecture for Online Services of Library Catalogs
Abstract. In recent years, more and more publications and material for studying and teaching, e. g. for Web-based teaching (WBT), appear "online" and digital libraries ar...
Marcus Flehmig
150
Voted
DATE
2000
IEEE
105views Hardware» more  DATE 2000»
15 years 10 months ago
System Synthesis for Multiprocessor Embedded Applications
This paper presents the system synthesis techniques available in S3 E2 S, a CAD environment for the specification, simulation, and synthesis of embedded electronic systems that ca...
Luigi Carro, Márcio Eduardo Kreutz, Fl&aacu...
ASPDAC
2010
ACM
163views Hardware» more  ASPDAC 2010»
15 years 3 months ago
A PUF design for secure FPGA-based embedded systems
The concept of having an integrated circuit (IC) generate its own unique digital signature has broad application in areas such as embedded systems security, and IP/IC counterpiracy...
Jason Helge Anderson