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HPCA
2003
IEEE
15 years 10 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M...
IPPS
2000
IEEE
15 years 2 months ago
Fast Synchronization on Scalable Cache-Coherent Multiprocessors using Hybrid Primitives
This paper presents a new methodology for implementing fast synchronization on scalable cache-coherent multiprocessors, through the use of hybrid primitives. Hybrid primitives lev...
Dimitrios S. Nikolopoulos, Theodore S. Papatheodor...
BIRTHDAY
2012
Springer
13 years 5 months ago
A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors
3-D integration presents many new opportunities for architects and embedded systems designers. However, 3-D integration has not yet been explored by the cryptographic hardware com...
Jonathan Valamehr, Ted Huffmire, Cynthia E. Irvine...
IPPS
2008
IEEE
15 years 4 months ago
Build to order linear algebra kernels
—The performance bottleneck for many scientific applications is the cost of memory access inside linear algebra kernels. Tuning such kernels for memory efficiency is a complex ...
Jeremy G. Siek, Ian Karlin, Elizabeth R. Jessup
MSS
2003
IEEE
117views Hardware» more  MSS 2003»
15 years 3 months ago
NAS Switch: A Novel CIFS Server Virtualization
This paper proposes a CIFS Server virtualization method which requires no proprietary software or hardware for clients or NAS units. The method is implemented as an in-band networ...
Wataru Katsurashima, Satoshi Yamakawa, Takashi Tor...