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ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
15 years 3 months ago
A high performance distributed-parallel-processor architecture for 3D IIR digital filters
—Real-time spatio-temporal VLSI 3D IIR digital filters may be used for imaging or beamforming applications employing 3D input signals from synchronously-sampled multi-sensor arra...
Arjuna Madanayake, Leonard T. Bruton
TVCG
1998
121views more  TVCG 1998»
14 years 9 months ago
Interactive Volume Navigation
—Volume navigation is the interactive exploration of volume data sets by “flying” the viewpoint through the data, producing a volume rendered view at each frame. We present a...
Martin L. Brady, Kenneth K. Jung, H. T. Nguyen, Th...
ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
15 years 2 months ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
EUC
2006
Springer
15 years 1 months ago
A Processor Extension for Cycle-Accurate Real-Time Software
Certain hard real-time tasks demand precise timing of events, but the usual software solution of periodic interrupts driving a scheduler only provides precision in the millisecond ...
Nicholas Jun Hao Ip, Stephen A. Edwards
HPCA
1998
IEEE
15 years 2 months ago
Comparative Evaluation of Latency Tolerance Techniques for Software Distributed Shared Memory
A key challenge in achieving high performance on software DSM systems is overcoming their relatively large communication latencies. In this paper, we consider two techniques which...
Todd C. Mowy, Charles Q. C. Chan, Adley K. W. Lo