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ICPP
2005
IEEE
15 years 8 months ago
Peak Power Control for a QoS Capable On-Chip Network
In recent years integrating multiprocessors in a single chip is emerging for supporting various scientific and commercial applications, with diverse demands to the underlying on-c...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum
IEEESCC
2005
IEEE
15 years 8 months ago
SOA Without Web Services: a Pragmatic Implementation of SOA for Financial Transactions Systems
The Service Oriented Architecture (SOA) provides a methodology for designing software systems by integrating loosely coupled services. Compared to traditional distributed object-o...
Ziyang Duan, Subhra Bose, Charles A. Shoniregun, P...
IPPS
2002
IEEE
15 years 8 months ago
System-Level Analysis for MPEG-4 Decoding on a Multi-Processor Architecture
The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...
HPCA
2000
IEEE
15 years 7 months ago
Improving the Throughput of Synchronization by Insertion of Delays
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
Ravi Rajwar, Alain Kägi, James R. Goodman
IPPS
2010
IEEE
15 years 27 days ago
User level DB: a debugging API for user-level thread libraries
With the advent of the multicore era, parallel programming is becoming ubiquitous. Multithreading is a common approach to benefit from these architectures. Hybrid M:N libraries lik...
Kevin Pouget, Marc Pérache, Patrick Carriba...