210 search results - page 15 / 42 » A Self-Reconfigurable Gate Array Architecture |
FPL
2004
Springer
15 years 5 months ago
2004
Springer
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
FPGA
2009
ACM
15 years 6 months ago
2009
ACM
Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...
134
click to vote
FPGA
2003
ACM
15 years 4 months ago
2003
ACM
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
93
Voted
FPL
2005
Springer
15 years 5 months ago
2005
Springer
This paper presents an architecture and a synthesis method for programmable numerical function generators of trigonometric functions, logarithm functions, square root, reciprocal,...
FTEDA
2007
14 years 11 months ago
2007
Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over the last decade. A crucial part of their creation lies in their archite...