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» A Self-Tuning Cache Architecture for Embedded Systems
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106
Voted
DAC
1999
ACM
16 years 19 days ago
A Low Power Hardware/Software Partitioning Approach for Core-Based Embedded Systems
We present a novel approach that minimizes the power consumption of embedded core-based systems through hardware/software partitioning. Our approach is based on the idea of mapping...
Jörg Henkel
75
Voted
DAC
1999
ACM
16 years 19 days ago
Cycle-Accurate Simulation of Energy Consumption in Embedded Systems
This paper presents a methodology for cycle-accurate simulation of energy dissipation in embedded systems. The ARM Ltd. 1 instruction-level cycle-accurate simulator is extended wi...
Tajana Simunic, Luca Benini, Giovanni De Micheli
DAC
2000
ACM
16 years 19 days ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf
IOT
2010
14 years 9 months ago
A resource oriented architecture for the Web of Things
Abstract--Many efforts are centered around creating largescale networks of "smart things" found in the physical world (e.g., wireless sensor and actuator networks, embedd...
Dominique Guinard, Vlad Trifa, Erik Wilde
RTAS
2006
IEEE
15 years 5 months ago
Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller