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» A Sequential Reduction Strategy
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67
Voted
ISQED
2006
IEEE
85views Hardware» more  ISQED 2006»
15 years 3 months ago
Pessimism Reduction In Static Timing Analysis Using Interdependent Setup and Hold Times
— A methodology is proposed for interdependent setup time and hold time characterization of sequential circuits. Integrating the methodology into an industrial sign-off static ti...
Emre Salman, Eby G. Friedman, Ali Dasdan, Feroze T...
83
Voted
PR
2006
229views more  PR 2006»
14 years 9 months ago
FS_SFS: A novel feature selection method for support vector machines
In many pattern recognition applications, high-dimensional feature vectors impose a high computational cost as well as the risk of "overfitting". Feature Selection addre...
Yi Liu, Yuan F. Zheng
TASLP
2002
109views more  TASLP 2002»
14 years 9 months ago
Particle methods for Bayesian modeling and enhancement of speech signals
This paper applies time-varying autoregressive (TVAR) models with stochastically evolving parameters to the problem of speech modeling and enhancement. The stochastic evolution mod...
Jaco Vermaak, Christophe Andrieu, Arnaud Doucet, S...
64
Voted
CDC
2009
IEEE
115views Control Systems» more  CDC 2009»
15 years 2 months ago
An error bound for model reduction of Lur'e-type systems
— In general, existing model reduction techniques for stable nonlinear systems lack a guarantee on stability of the reduced-order model, as well as an error bound. In this paper,...
Bart Besselink, Nathan van de Wouw, Henk Nijmeijer
DAC
1995
ACM
15 years 1 months ago
Automatic Clock Abstraction from Sequential Circuits
Our goal is to transform a low-level circuit design into a more representation. A pre-existing tool, Tranalyze [4], takes a switch-level circuit and generates a functionally equiv...
Samir Jain, Randal E. Bryant, Alok Jain