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» A Sequential Reduction Strategy
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CODES
2010
IEEE
14 years 8 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
ICCS
2004
Springer
15 years 3 months ago
Improvements in FSM Evolutions from Partial Input/Output Sequences
This work focuses on the synthesis of finite-state machines (FSMs) by observing its input/output behaviors. Evolutionary approaches that have been proposed to solve this problem do...
Sérgio G. Araújo, Antônio C. M...
VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
15 years 10 months ago
Estimation of Maximum Power-Up Current
Power gating is emerging as a viable solution to reduction of leakage current. However, power gated circuits are different from the conventional designs in the sense that a power-...
Fei Li, Lei He, Kewal K. Saluja
FPGA
2009
ACM
180views FPGA» more  FPGA 2009»
15 years 4 months ago
Scalable don't-care-based logic optimization and resynthesis
We describe an optimization method for combinational and sequential logic networks, with emphasis on scalability and the scope of optimization. The proposed resynthesis (a) is cap...
Alan Mishchenko, Robert K. Brayton, Jie-Hong Rolan...
SAC
2004
ACM
15 years 3 months ago
A new algorithm for gap constrained sequence mining
The sequence mining problem consists in finding frequent sequential patterns in a database of time-stamped events. Several application domains require limiting the maximum tempor...
Salvatore Orlando, Raffaele Perego, Claudio Silves...