420 search results - page 21 / 84 » A Small Test Generator for Large Designs |
ITC
2002
IEEE
15 years 5 months ago
2002
IEEE
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
ICSE
2009
IEEE-ACM
15 years 7 months ago
2009
IEEE-ACM
It is labor-intensive to manually verify the outputs of a large set of tests that are not equipped with test oracles. Test selection helps to reduce this cost by selecting a small...
104
Voted
ICSE
2008
IEEE-ACM
16 years 1 months ago
2008
IEEE-ACM
Mutants are automatically-generated, possibly faulty variants of programs. The mutation adequacy ratio of a test suite is the ratio of non-equivalent mutants it is able to identif...
68
Voted
DAC
2009
ACM
16 years 1 months ago
2009
ACM
The discrepancy between integrated circuits' activities in normal functional mode and that in structural test mode has an increasing adverse impact on the effectiveness of ma...
98
Voted
SIGGRAPH
1990
ACM
15 years 4 months ago
1990
ACM
Rapid developments in the design of algorithms for rendering globally illuminated scenes have taken place in the past five years. Net energy methods such as the hemicube and other...