340 search results - page 24 / 68 » A Statistical Performance Simulation Methodology for VLSI Ci... |
DAC
2004
ACM
16 years 22 days ago
2004
ACM
With deep-sub-micron (DSM) technology, statistical timing analysis becomes increasingly crucial to characterize signal transmission over global interconnect wires. In this paper, ...
SIGDIAL
2010
14 years 9 months ago
2010
Statistical user simulation is a promising methodology to train and evaluate the performance of (spoken) dialog systems. We work with a modular architecture for data-driven simula...
DAC
2005
ACM
15 years 1 months ago
2005
ACM
Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
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GLVLSI
2009
IEEE
15 years 6 months ago
2009
IEEE
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
ISCA
2000
IEEE
15 years 4 months ago
2000
IEEE
As microprocessors continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models and sy...