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FPL
2008
Springer
153views Hardware» more  FPL 2008»
14 years 11 months ago
Exploring FPGA network on chip implementations across various application and network loads
Abstract-The network on chip will become a future general purpose interconnect for FPGAs much like today's standard OPB or PLB bus architectures. However, performance characte...
Graham Schelle, Dirk Grunwald
FPGA
2004
ACM
120views FPGA» more  FPGA 2004»
15 years 2 months ago
Flexibility measurement of domain-specific reconfigurable hardware
Traditional metrics used to compare hardware designs include area, performance, and power. However, these metrics do not form a complete evaluation of reconfigurable hardware. For...
Katherine Compton, Scott Hauck
IPPS
2007
IEEE
15 years 3 months ago
Speedup using Flowpaths for a Finite Difference Solution of a 3D Parabolic PDE
Partial differential equations (PDEs) are used to model physical phenomena and then appropriate convergent numerical algorithms are employed to solve them and create computer simu...
Darrin M. Hanna, Anna M. Spagnuolo, Michael DuChen...
ACIVS
2005
Springer
15 years 3 months ago
Reduced-Bit, Full Search Block-Matching Algorithms and Their Hardware Realizations
Abstract. The Full Search Block-Matching Motion Estimation (FSBME) algorithm is often employed in video coding for its regular dataflow and straightforward architectures. By iterat...
Vincent M. Dwyer, Shahrukh Agha, Vassilios A. Chou...
FPL
2010
Springer
155views Hardware» more  FPL 2010»
14 years 7 months ago
Design and Implementation of Real-Time Transactional Memory
Transactional memory is a promising, optimistic synchronization mechanism for chip-multiprocessor systems. The simplicity of atomic sections, instead of using explicit locks, is al...
Martin Schoeberl, Peter Hilber