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» A Temporal Logic of Robustness
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FMCAD
1998
Springer
15 years 5 months ago
Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
Sergey Berezin, Armin Biere, Edmund M. Clarke, Yun...
TABLEAUX
1998
Springer
15 years 5 months ago
Model Checking: Historical Perspective and Example (Extended Abstract)
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
Edmund M. Clarke, Sergey Berezin
ICCAD
1996
IEEE
140views Hardware» more  ICCAD 1996»
15 years 5 months ago
Register-transfer level estimation techniques for switching activity and power consumption
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
DAC
1996
ACM
15 years 5 months ago
A New Hybrid Methodology for Power Estimation
1 In this paper, we propose a hybrid approach for estimating the switching activities of the internal nodes in logic circuits. The new approach combines the advantages of the simul...
David Ihsin Cheng, Kwang-Ting Cheng, Deborah C. Wa...
RTSS
1993
IEEE
15 years 5 months ago
Object-Based Semantic Real-Time Concurrency Control
This paper presents a technique that is capable of supporting two major requirements for concurrency control in real-time databases: data temporal consistency, and data logical co...
Lisa Cingiser DiPippo, Victor Fay Wolfe