70 search results - page 8 / 14 » A Test Pattern Generation Methodology for Low-Power Consumpt... |
113
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APSEC
2004
IEEE
15 years 3 months ago
2004
IEEE
Unit testing is a methodology for testing small parts of an application independently of whatever application uses them. It is time consuming and tedious to write unit tests, and ...
GLVLSI
2002
IEEE
15 years 4 months ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
109
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EURODAC
1995
IEEE
15 years 3 months ago
1995
IEEE
This paper describes the features and design methodology of MIDA, a MPEG1 integrated audio decoder. MIDA has been almost completely designed using automatic synthesis of VHDL desc...
120
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DFT
2006
IEEE
15 years 5 months ago
2006
IEEE
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
ICCAD
2005
IEEE
15 years 8 months ago
2005
IEEE
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...