499 search results - page 56 / 100 » A Three-Phase Algorithm for Computer Aided siRNA Design |
102
click to vote
DAC
2007
ACM
16 years 3 months ago
2007
ACM
We present an efficient technique for finding the mean and variance of the full-chip leakage of a candidate design, while considering logic-structures and both die-to-die and with...
DAC
2005
ACM
16 years 3 months ago
2005
ACM
Placement migration is the movement of cells within an existing placement to address a variety of post-placement design closure issues, such as timing, routing congestion, signal ...
131
Voted
GLVLSI
2006
IEEE
15 years 8 months ago
2006
IEEE
In modern IC design, the number of long on-chip wires has been growing rapidly because of the increasing circuit complexity. Interconnect delay has dominated over gate delay as te...
131
click to vote
DAC
2004
ACM
16 years 3 months ago
2004
ACM
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...
103
click to vote
SLIP
2009
ACM
15 years 9 months ago
2009
ACM
As technology advances, 3D ICs are introduced for alleviating the interconnect problem coming with shrinking feature size and increasing integration density. In 3D ICs, one of the...