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149
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EDCC
2008
Springer
15 years 5 months ago
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
Roman Obermaisser, Hubert Kraut, Christian El Sall...
TSE
2011
114views more  TSE 2011»
14 years 10 months ago
Loupe: Verifying Publish-Subscribe Architectures with a Magnifying Lens
Abstract— The Publish-Subscribe (P/S) communication paradigm fosters high decoupling among distributed components. This facilitates the design of dynamic applications, but also i...
Luciano Baresi, Carlo Ghezzi, Luca Mottola
143
Voted
EUROMICRO
1999
IEEE
15 years 7 months ago
Design Space Exploration in System Level Synthesis under Memory Constraints
This paper addresses the problem of component selection, task assignment and task scheduling for distributed embedded computer systems. Such systems have a large number of constra...
Radoslaw Szymanek, Krzysztof Kuchcinski
LCTRTS
2001
Springer
15 years 7 months ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
150
Voted
WWW
2003
ACM
16 years 4 months ago
Application specific data replication for edge services
The emerging edge services architecture promises to improve the availability and performance of web services by replicating servers at geographically distributed sites. A key chal...
Lei Gao, Michael Dahlin, Amol Nayate, Jiandan Zhen...