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» A cis-regulatory logic simulator
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ICALP
2007
Springer
15 years 5 months ago
Ready Simulation for Concurrency: It's Logical!
Gerald Lüttgen, Walter Vogler
ISVLSI
2002
IEEE
84views VLSI» more  ISVLSI 2002»
15 years 4 months ago
Improving Structural FSM Traversal by Constraint-Satisfying Logic Simulation
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
ATS
1997
IEEE
90views Hardware» more  ATS 1997»
15 years 3 months ago
Exploiting Logic Simulation to Improve Simulation-based Sequential ATPG
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...
67
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VLSID
1996
IEEE
112views VLSI» more  VLSID 1996»
15 years 3 months ago
Distributed logic simulation: time-first evaluation vs. event driven algorithms
S. Sundaram, Lalit M. Patnaik