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» A classification of design steps and their verification
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DAC
2004
ACM
15 years 10 months ago
A SAT-based algorithm for reparameterization in symbolic simulation
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
Pankaj Chauhan, Edmund M. Clarke, Daniel Kroening
TNN
2008
132views more  TNN 2008»
14 years 9 months ago
Just-in-Time Adaptive Classifiers - Part I: Detecting Nonstationary Changes
Abstract--The stationarity requirement for the process generating the data is a common assumption in classifiers' design. When such hypothesis does not hold, e.g., in applicat...
Cesare Alippi, Manuel Roveri
GLVLSI
2008
IEEE
147views VLSI» more  GLVLSI 2008»
15 years 4 months ago
Statistical timing analysis of flip-flops considering codependent setup and hold times
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
Safar Hatami, Hamed Abrishami, Massoud Pedram
DATE
1999
IEEE
172views Hardware» more  DATE 1999»
15 years 1 months ago
An Object-Based Executable Model for Simulation of Real-Time Hw/Sw Systems
This paper describes a simulation technique for RealTime Hw/Sw systems based on an object executable model. It allows designers to seamlessly estimate and verify their solutions f...
Olivier Pasquier, Jean Paul Calvez
DEXAW
1998
IEEE
94views Database» more  DEXAW 1998»
15 years 1 months ago
Towards Access Control for Logical Document Structures
This paper presents a first step towards a security model that defines access control for logical document structures. el benefits from roles to abstract from users and from secur...
Fredj Dridi, Gustaf Neumann