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» A classification of design steps and their verification
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DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
15 years 3 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
ICASSP
2011
IEEE
14 years 1 months ago
Compressed classification of observation sets with linear subspace embeddings
We consider the problem of classification of a pattern from multiple compressed observations that are collected in a sensor network. In particular, we exploit the properties of r...
Dorina Thanou, Pascal Frossard
CHI
2006
ACM
15 years 10 months ago
In search of end-users
Learning from end-users is essential to participatory design. In order to learn from end-users we need to find end-users to collaborate with. However, finding end-users can be the...
Rachel K. E. Bellamy, Tracee Vetting Wolf, Rhonda ...
ISSS
2002
IEEE
127views Hardware» more  ISSS 2002»
15 years 2 months ago
Validation in a Component-Based Design Flow for Multicore SoCs
Currently, since many SoCs include heterogeneous components such as CPUs, DSPs, ASICs, memories, buses, etc., system integration becomes a major step in the design flow. To enable...
Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima,...
DAC
2003
ACM
15 years 10 months ago
Design techniques for sensor appliances: foundations and light compass case study
We propose the first systematic, sensor-centric approach for quantitative design of sensor network appliances. We demonstrate its use by designing light appliance devices and the ...
Jennifer L. Wong, Seapahn Megerian, Miodrag Potkon...