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» A code-generator generator for multi-output instructions
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APLAS
2007
ACM
15 years 1 months ago
Deriving Compilers and Virtual Machines for a Multi-level Language
We develop virtual machines and compilers for a multi-level language, which supports multi-stage specialization by composing program fragments with quotation mechanisms. We conside...
Atsushi Igarashi, Masashi Iwaki
ECOOPW
1998
Springer
15 years 1 months ago
A Rational Approach to Portable High Performance: The Basic Linear Algebra Instruction Set (BLAIS) and the Fixed Algorithm Size
Abstract. We introduce a collection of high performance kernels for basic linear algebra. The kernels encapsulate small xed size computations in order to provide building blocks fo...
Jeremy G. Siek, Andrew Lumsdaine
DAC
1995
ACM
15 years 1 months ago
Code Optimization Techniques for Embedded DSP Microprocessors
—We address the problem of code optimization for embedded DSP microprocessors. Such processors (e.g., those in the TMS320 series) have highly irregular datapaths, and conventiona...
Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Stev...
IEEEPACT
2002
IEEE
15 years 2 months ago
Effective Compilation Support for Variable Instruction Set Architecture
Traditional compilers perform their code generation tasks based on a fixed, pre-determined instruction set. This paper describes the implementation of a compiler that determines ...
Jack Liu, Timothy Kong, Fred C. Chow
CSSE
2008
IEEE
15 years 4 months ago
Generation of Executable Representation for Processor Simulation with Dynamic Translation
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...
Jiajia Song, HongWei Hao, Claude Helmstetter, Vani...