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ESCIENCE
2006
IEEE
15 years 5 months ago
Designing Workflow Components for e-Science
In this paper we present a general domain for the analysis of workflows and workflow components based on the notion of a collection of Turing machines sharing a set of tapes. We s...
Frank Terpstra, Pieter W. Adriaans
IPPS
2006
IEEE
15 years 7 months ago
Reducing the associativity and size of step caches in CRCW operation
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
M. Forsell
PPOPP
2006
ACM
15 years 7 months ago
High-performance IPv6 forwarding algorithm for multi-core and multithreaded network processor
IP forwarding is one of the main bottlenecks in Internet backbone routers, as it requires performing the longest-prefix match at 10Gbps speed or higher. IPv6 forwarding further ex...
Xianghui Hu, Xinan Tang, Bei Hua
HPCA
2000
IEEE
15 years 5 months ago
Register Organization for Media Processing
Processor architectures with tens to hundreds of arithmetic units are emerging to handle media processing applications. These applications, such as image coding, image synthesis, ...
Scott Rixner, William J. Dally, Brucek Khailany, P...
HPCA
1999
IEEE
15 years 5 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...