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105
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VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
15 years 12 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
LICS
2007
IEEE
15 years 5 months ago
The Cost of Punctuality
In an influential paper titled “The Benefits of Relaxing Punctuality” [2], Alur, Feder, and Henzinger introduced Metric Interval Temporal Logic (MITL) as a fragment of the r...
Patricia Bouyer, Nicolas Markey, Joël Ouaknin...
88
Voted
FORTE
2004
15 years 1 months ago
Localizing Program Errors for Cimple Debugging
Abstract. We present automated techniques for the explanation of counterexamples, where a counter-example should be understood as a sequence of program statements. Our approach is ...
Samik Basu, Diptikalyan Saha, Scott A. Smolka
SPIN
2007
Springer
15 years 5 months ago
Tutorial: Parallel Model Checking
d Abstract) Luboˇs Brim and Jiˇr´ı Barnat Faculty of Informatics, Masaryk University, Brno, Czech Republic With the increase in the complexity of computer systems, it becomes e...
Lubos Brim, Jiri Barnat