Sciweavers

2297 search results - page 40 / 460
» A fast APRIORI implementation
Sort
View
FPL
2003
Springer
100views Hardware» more  FPL 2003»
15 years 3 months ago
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Nazar A. Saqib, Francisco Rodríguez-Henr&ia...
ISCA
2002
IEEE
82views Hardware» more  ISCA 2002»
15 years 3 months ago
Increasing Processor Performance by Implementing Deeper Pipelines
One architectural method for increasing processor performance involves increasing the frequency by implementing deeper pipelines. This paper will explore the relationship between ...
Eric Sprangle, Doug Carmean
110
Voted
FPGA
2009
ACM
482views FPGA» more  FPGA 2009»
15 years 3 months ago
A 17ps time-to-digital converter implemented in 65nm FPGA technology
This paper presents a new architecture for time-to-digital conversion enabling a time resolution of 17ps over a range of 50ns with a conversion rate of 20MS/s. The proposed archit...
Claudio Favi, Edoardo Charbon
CVIU
2010
115views more  CVIU 2010»
14 years 10 months ago
A modified model for the Lobula Giant Movement Detector and its FPGA implementation
Bio-inspired vision sensors are particularly appropriate candidates for navigation of vehicles or mobile robots due to their computational simplicity, allowing compact hardware im...
Hongying Meng, Kofi Appiah, Shigang Yue, Andrew Hu...
JCC
2008
125views more  JCC 2008»
14 years 10 months ago
Efficient electronic integrals and their generalized derivatives for object oriented implementations of electronic structure cal
: For the new parallel implementation of electronic structure methods in ACES III (Lotrich et al., in preparation) the present state-of-the-art algorithms for the evaluation of ele...
Norbert Flocke, Victor Lotrich