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ARVLSI
1995
IEEE
78views VLSI» more  ARVLSI 1995»
15 years 1 months ago
A technique for high-speed, fine-resolution pattern generation and its CMOS implementation
This paper presents an architecture for generating a high-speed data pattern with precise edge placement resolution by using the matched delay technique. The technique involves ...
Gary C. Moyer, Mark Clements, Wentai Liu, Toby Sch...
ARCS
2008
Springer
15 years 12 days ago
An Optimized ZGEMM Implementation for the Cell BE
: The architecture of the IBM Cell BE processor represents a new approach for designing CPUs. The fast execution of legacy software has to stand back in order to achieve very high ...
Timo Schneider, Torsten Hoefler, Simon Wunderlich,...
ISCA
2011
IEEE
229views Hardware» more  ISCA 2011»
14 years 2 months ago
TLSync: support for multiple fast barriers using on-chip transmission lines
As the number of cores on a single-chip grows, scalable barrier synchronization becomes increasingly difficult to implement. In software implementations, such as the tournament ba...
Jungju Oh, Milos Prvulovic, Alenka G. Zajic
ICIP
2004
IEEE
15 years 12 months ago
Learning structured dictionaries for image representation
The dictionary approach to signal and image processing has been massively investigated in the last two decades, proving very attractive for a wide range of applications. The effec...
Gianluca Monaci, Pierre Vandergheynst
IPPS
2007
IEEE
15 years 4 months ago
A Configuration Control Mechanism Based on Concurrency Level for a Reconfigurable Consistency Algorithm
A Reconfigurable Consistency Algorithm (RCA) is an algorithm that guarantees the consistency in Distributed Shared Memory (DSM) Systems. In a RCA, there is a Configuration Control...
Christiane V. Pousa, Luís Fabrício W...