Sciweavers

76 search results - page 1 / 16
» A framework for testing special-purpose memories
Sort
View
119
Voted
CASES
2004
ACM
15 years 6 months ago
Safely exploiting multithreaded processors to tolerate memory latency in real-time systems
A coarse-grain multithreaded processor can effectively hide long memory latencies by quickly switching to an alternate task when the active task issues a memory request, improving...
Ali El-Haj-Mahmoud, Eric Rotenberg
76
Voted
DATE
2005
IEEE
96views Hardware» more  DATE 2005»
15 years 6 months ago
Framework for Fault Analysis and Test Generation in DRAMs
Abstract: With the increasing complexity of memory behavior, attempts are being made to come up with a methodical approach that employs electrical simulation to tackle the memory t...
Zaid Al-Ars, Said Hamdioui, Georg Mueller, A. J. v...
114
Voted
CODES
2005
IEEE
15 years 6 months ago
Rappit: framework for synthesis of host-assisted scripting engines for adaptive embedded systems
Scripting is a powerful, high-level, cross-platform, dynamic, easy way of composing software modules as black boxes. Unfortunately, the high runtime overhead has prevented scripti...
Jiwon Hahn, Qiang Xie, Pai H. Chou
103
Voted
TACAS
2007
Springer
105views Algorithms» more  TACAS 2007»
15 years 7 months ago
Hoare Logic for Realistically Modelled Machine Code
This paper presents a mechanised Hoare-style programming logic framework for assembly level programs. The framework has been designed to fit on top of operational semantics of rea...
Magnus O. Myreen, Michael J. C. Gordon
74
Voted
TCAD
2002
104views more  TCAD 2002»
15 years 22 days ago
A framework for testing special-purpose memories
Piotr R. Sidorowicz, Janusz A. Brzozowski