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RTS
2002
154views more  RTS 2002»
14 years 9 months ago
Flexible Soft Real-Time Processing in Middleware
As desktop computer computational power continues to increases dramatically, it is becoming commonplace to run a combination of deadline-sensitive applications. Despite the prolif...
Scott A. Brandt, Gary J. Nutt
DAC
2003
ACM
15 years 10 months ago
A tool for describing and evaluating hierarchical real-time bus scheduling policies
We present a tool suite for building, simulating, and analyzing the results of hierarchical descriptions of the scheduling policy for modules sharing a bus in real-time applicatio...
Trevor Meyerowitz, Claudio Pinello, Alberto L. San...
IPPS
2007
IEEE
15 years 4 months ago
A General Purpose Partially Reconfigurable Processor Simulator (PReProS)
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...
Alisson Vasconcelos De Brito, Matthias Kühnle...
ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
15 years 3 months ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
15 years 4 months ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...