109 search results - page 2 / 22 » A low power architecture for embedded perception |
ICCD
2000
IEEE
15 years 4 months ago
2000
IEEE
DATE
2007
IEEE
15 years 6 months ago
2007
IEEE
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...
97
Voted
DAC
2007
ACM
16 years 18 days ago
2007
ACM
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultralow-power designs may even permit embedded systems...
100
click to vote
GLVLSI
2008
IEEE
2008
IEEE
Simultaneous optimization of memory configuration and code allocation for low power embedded systems
14 years 11 months ago
This paper proposes a hybrid memory architecture which consists of the following two regions; 1) a dynamic power conscious region which uses low Vdd and Vth and 2) a static power ...
131
Voted
ISCAPDCS
2008
15 years 1 months ago
2008
This paper introduces a combination of models and proofs for optimal power management via Dynamic Frequency Scaling and Dynamic Voltage Scaling. The approach is suitable for syste...