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WMPI
2004
ACM
15 years 2 months ago
Compiler-optimized usage of partitioned memories
In order to meet the requirements concerning both performance and energy consumption in embedded systems, new memory architectures are being introduced. Beside the well-known use o...
Lars Wehmeyer, Urs Helmig, Peter Marwedel
74
Voted
COGSR
2011
77views more  COGSR 2011»
14 years 4 months ago
Learning to use episodic memory
This paper brings together work in modeling episodic memory and reinforcement learning. We demonstrate that is possible to learn to use episodic memory retrievals while simultaneo...
Nicholas A. Gorski, John E. Laird
MICRO
2010
IEEE
215views Hardware» more  MICRO 2010»
14 years 8 months ago
A Task-Centric Memory Model for Scalable Accelerator Architectures
This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
John H. Kelm, Daniel R. Johnson, Steven S. Lumetta...
LCPC
2005
Springer
15 years 3 months ago
A Systematic Approach to Model-Guided Empirical Search for Memory Hierarchy Optimization
The goal of this work is a systematic approach to compiler optimization for simultaneously optimizing across multiple levels of the memory hierarchy. Our approach combines compiler...
Chun Chen, Jacqueline Chame, Mary W. Hall, Kristin...
TIT
2008
118views more  TIT 2008»
14 years 8 months ago
Discrete-Input Two-Dimensional Gaussian Channels With Memory: Estimation and Information Rates Via Graphical Models and Statisti
Abstract--Discrete-input two-dimensional (2-D) Gaussian channels with memory represent an important class of systems, which appears extensively in communications and storage. In sp...
Ori Shental, Noam Shental, Shlomo Shamai, Ido Kant...