Sciweavers

50 search results - page 8 / 10
» A novel approach for network on chip emulation
Sort
View
CVPR
2007
IEEE
15 years 4 months ago
Surveillance in Virtual Reality: System Design and Multi-Camera Control
This paper advocates a Virtual Vision paradigm and demonstrates its usefulness in camera sensor network research. Virtual vision prescribes the use of a visually and behaviorally ...
Faisal Qureshi, Demetri Terzopoulos
66
Voted
DATE
2007
IEEE
173views Hardware» more  DATE 2007»
15 years 4 months ago
Analytical router modeling for networks-on-chip performance analysis
Networks-on-Chip (NoCs) have recently emerged as a scalable alternative to classical bus and point-to-point architectures. To date, performance evaluation of NoC designs is largel...
Ümit Y. Ogras, Radu Marculescu
ISCA
2011
IEEE
258views Hardware» more  ISCA 2011»
14 years 1 months ago
A case for heterogeneous on-chip interconnects for CMPs
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. ...
87
Voted
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
15 years 10 months ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel
DATE
2003
IEEE
96views Hardware» more  DATE 2003»
15 years 2 months ago
Time Domain Multiplexed TAM: Implementation and Comparison
One of the difficult problems which core-based systemon-chip (SoC) designs face is test access. For testing the cores in a SoC, a special mechanism is required, since they are no...
Zahra Sadat Ebadi, André Ivanov